JEE Main 2021 · 17 March · morning · Single correct · +4 / −1

The output of the given combination gates represents :

JEE Main PYQ figure
  1. (a) AND Gate
  2. (b) NOR Gate
  3. (c) NAND Gate
  4. (d) XOR Gate
Answer and solution

Answer (c) NAND Gate

Solution

Physics sir · 3 steps

A NOR with its two inputs tied together is only a NOT gate. Spot that first and the circuit becomes easy.

  1. Tied inputs. When both inputs of a NOR gate carry the same signal X, the output is X + X̅ = X̄. So the two input gates and the last gate each act as a NOT gate.
  2. Middle gate. The middle NOR receives Ā and B̄. By De Morgan's theorem its output is Ā + B̄̅ = A · B, which is an AND.

    Y = Ā + B̄̅̅ = A · B̅

    A, BĀ, B̄Middle NOR = ABY
    0, 01, 101
    0, 11, 001
    1, 00, 101
    1, 10, 010
  3. So. The output is 0 only when both inputs are 1, so Y = A · B̅. The circuit is a NAND gate, option (c).

The idea to keep. A NOR or NAND gate with its inputs shorted together is a NOT gate. Replace those gates with NOT first, then use De Morgan's theorem on what remains.

Answer from the NTA final answer key. Solution by PrepWiser.

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Asked about 170 times in JEE Main since 2020. This question is from 2021.