JEE Main 2023 · 8 April · morning · Single correct · +4 / −1
For the logic circuit shown, the output waveform at Y is:
- (a)
- (b)
- (c)
- (d)
Answer and solution
Answer (b)
Solution
Physics sir · 3 steps
Each NAND with its inputs joined is just a NOT gate, so the whole circuit turns into a plain OR gate.
- Shorted NAND. When both inputs of a NAND gate are tied together, the output is A · A̅ = A̅. So the first two gates give A̅ and B̅.
Y = A̅·B̅̅ = A̅̅̅ + B̅̅̅ = A + B
- Read the inputs. By De Morgan's theorem the circuit is an OR gate. A is 0 up to t = 2 and 1 after that. B is 1 only from 1 to 2 and after 3.
Interval A B Y = A + B 0 to 1 0 0 0 1 to 2 0 1 1 2 to 3 1 0 1 3 to 4 1 1 1 - So. Y stays low from 0 to 1 and is high from t = 1 onwards. That is waveform (b).
The idea to keep. NAND gates with joined inputs act as NOT gates. Inverting both inputs of a NAND gives an OR gate, so reduce the circuit first and then read the waveform interval by interval.
Answer from the NTA final answer key. Solution by PrepWiser.