JEE Main 2025 · 29 January · morning · Single correct · +4 / −1

For the circuit shown above, equivalent GATE is :

JEE Main PYQ figure
  1. (a) NOT gate
  2. (b) NAND gate
  3. (c) AND gate
  4. (d) OR gate
Answer and solution

Answer (d) OR gate

Solution

Physics sir · 2 steps

Write what each gate outputs, feed both into the last NAND, and test all four input pairs.

  1. Read the circuit. The top gate is a NAND of A and B, giving A̅B̅. The bottom gate is a NOR of the same inputs, giving A̅+̅B̅. Both outputs go into a final NAND gate.

    Y = A̅B̅·A̅+̅B̅̅ = AB + (A+B) = A + B

    A, BNAND A̅B̅NOR A̅+̅B̅Y
    0, 0110
    0, 1101
    1, 0101
    1, 1001
  2. So. Y is 0 only when both inputs are 0 and 1 otherwise. That is the truth table of an OR gate, option (d).

The idea to keep. For a combination of gates, write each gate's output, then simplify with De Morgan (X̅·Y̅̅ = X + Y). Confirm with a four-row truth table.

Answer from the NTA final answer key. Solution by PrepWiser.

Study Semiconductors & Electronic Devices

Asked about 170 times in JEE Main since 2020. This question is from 2025.