JEE Main 2025 · 24 January · evening · Single correct · +4 / −1

The output of the circuit is low (zero) for :
(A) X=0, Y=0
(B) X=0, Y=1
(C) X=1, Y=0
(D) X=1, Y=1
Choose the correct answer from the options given below :

JEE Main PYQ figure
  1. (a) (A), (B) and (C) only
  2. (b) (A), (C) and (D) only
  3. (c) (B), (C) and (D) only
  4. (d) (A), (B) and (D) only
Answer and solution

Answer (c) (B), (C) and (D) only

Solution

Physics sir · 3 steps

The second gate's two inputs are joined, so that NOR is just a NOT. OR then NOT makes the whole circuit a NOR.

  1. First gate. X and Y go into an OR gate, so the wire leaving it carries X + Y.
  2. Second gate. That one wire feeds both inputs of a NOR gate. A NOR with the same signal A on both inputs gives A + A̅ = A̅, so it works as a NOT gate.

    Output = X + Y̅

    CaseX, YX + YOutput X̅+̅Y̅
    (A)0, 001 (high)
    (B)0, 110 (low)
    (C)1, 010 (low)
    (D)1, 110 (low)
  3. So. The output is low for (B), (C) and (D). It is high only when both inputs are 0, which is option (c).

The idea to keep. When both inputs of a NAND or NOR gate are tied together, the gate becomes a NOT gate. Simplify it first, then the rest of the circuit is easy to read.

Answer from the NTA final answer key. Solution by PrepWiser.

Study Semiconductors & Electronic Devices

Asked about 170 times in JEE Main since 2020. This question is from 2025.